Empowering the Next Era of AI Memory, Edge Intelligence & Privacy Computing
Highlights on Display
- MemorAiLink® AI Memory Platform – One-stop memory + IP + packaging integration for superior AI SoC efficiency
- RPC® inside G120 Subsystem– Hsinchu Science Park award-winning AI edge solution featuring compact, low-power RPC DRAM®
- eYs3D Physical AI– Stereo vision & edge computing platforms enabling autonomy in robots, drones & smart infrastructure
- DeCloak Privacy-Intelligent AI – Real-time de-identification with CES Innovation Awards honoree technologies
- eEver USB PD3.2 Solutions – Certified USB Type-C power delivery controllers for next-generation devices
📍 Meet Etron at CES 2026, booth 14841(LVCC)
📅 Las Vegas • Jan. 6–9, 2026
We look forward to connecting with you.
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ESWEEK 2025 – Embedded System Week – Dr Nicky Lu’s Slide Deck
Challenges in the Symbiosis between Semiconductors and AI: Optimizing Cost-Performance-Power through Second-Path Moore’s Law Scaling, Especially for Edge-AI Embedded Systems
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A Second-Path Moore’s Law Scaling (2PMLS) Below 10nm to Optimize PPACT- Part I: Inventions on Outside-Gate Structures for Fin/GAA-Transistors and 6T SRAM Cells with Modeling Results
《A Second-Path Moore’s Law Scaling (2PMLS) Below 10nm to Optimize PPACT – Part I》 focuses on innovative approaches for sub-10nm nodes, with in-depth exploration of outside-gate structures for FinFET and GAA transistors, as well as design optimizations for 6T SRAM cells.
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Challenges to Symbiotic Growth of Semiconductor & AI Industries: A 2nd-Path Moore’s Law Scaling for Deep, Broad, and Exponential Intelligence Economics
DRC (Design & Research Collaboration) is a platform that fosters innovation through hands-on design, teamwork, and problem-solving. It encourages cross-functional collaboration and practical learning to drive meaningful R&D outcomes.
KGDM™
Known Good Die Memory
A Pioneer and Leader in KGD Memory
- Enable the Integration of Memory and System-Chip in One Package
RPC DRAM®
Low Pin Count DRAM
World′s 1st DRAM in Wafer Level Chip Size Package (WLCSP)
- The Smallest and Least Expensive Package Option
Monolithic and Heterogeneous Integration (MHI™)
- Optimizing MHI of Si & Non-Si Materials/Devices
- Creating Self-Smart MicroSystems
SUSTAINABILITY
ESG
Etron Technology, Inc. management team recognizes that compliance with the Responsible Business Alliance (RBA) Code of Conduct is the basic condition for a responsible company and the dedication of its efforts. Besides profitability, the company should pursue the principle of “Utilize whatever you take from the society and contribute back to the society”, and extend the influence over stakeholders, including employees, customers, suppliers, shareholders, the public and the government to meet their expectations.
NEWS
Latest News-
Product News
Empowering the 2026 AI Era: Etron’s MemorAiLink® Ecosystem Leveraging a comprehensive DRAM portfolio and a reliable supply of DDR4/LPDDR4/4X Providing end-to-end solutions for AI computing and the evolving needs of heterogeneous memory integration
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Company News
Etron Announces Revenue of November 2025
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Technical Papers
What is KGD? Understanding the definition, functions, and application examples of KGD.
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Video/Event
<CES 2025> Etron Tech Will Showcase Comprehensive Memory Solutions – RPC DRAM, MemorAiLink IP Platform and Longevity Support for Specialty Buffer Memory for Generative AI at the Edge. Welcome to Explore Unlimited Possibilities in the AI Field Together!
RECRUIT
Join UsEtron supports our colleagues with competitive career development and life-enhancing programs. Besides professional courses taught by company instructors or invited speakers, we encourage employees to participate in external occupational training programs
- Initiative
- Honor
- Courage
- Team
COMPANY
About EtronEtron Technology, Inc. (Taiwan GTSM: 5351) is a world-class fabless IC design and product company founded in February 1991, specializing in buffer memory and system-on-chips.