A Second-Path Moore's Law Scaling (2PMLS) Below 10nm to Optimize PPACT- Part I: Inventions on Outside-Gate Structures for Fin/GAA-Transistors and 6T SRAM Cells with Modeling Results
An Interview with Dr. Nicky Lu by IEEE CAS
Remembering Dr. Simon Sze (施敏院士): A Seminal Figure in Semiconductor Technology, Mentor, and Visionary
What is KGD? Understanding the definition, functions, and application examples of KGD.
What is Specialty DRAM? Understand the functions and applications of DRAM.
DIGITIMES / Monolithic Heterogeneous Integration to Drive Silicon 4.0
DIGITIMES/ Monolithic Heterogeneous integration to drive Silicon 4.0
The 79th Device Research Conference (DRC) / Optimizing Monolithic and Heterogeneous Integration
ISSM 2020 / A New Smart-MicroSystems Age
EETIMES / Realtime Video SWaP-C Tradeoffs and the RPC DRAM